ESREF 2013 symposium

19 September 2013


The ESREF 2013, the 24th "European Symposium on Reliability of Electron Devices, Failure Physics and Analysis", will take place in Arcachon (France) from September 30th to October 4th, 2013. On this event, Dr. Peter de Veen, R&D manager and Physical Analysis department manager of MASER Engineering, will give a presentation entitled “Failure Localization using Lock-In Thermography”. This presentation is part of the special ESREF “Case Studies workshop”, which will be held on Thursday October 3rd, at 14:40-17:40h.


The ever increasing complexity of IC packages, in order to meet the need for more electronic functionality, raises the bar for physical failure analysis. These packages, sometimes containing multiple stacks of dies, can be an enormous challenge for root cause failure analysis of field returns or for yield improvements.

MASER Engineering recently added a Lock-In Thermography (LIT) tool to her diagnostic services for thermal analysis (i.e. the DCG systems ELITE TDL 640 system). This ELITE system has the capability to detect small heat sources (e.g. short circuits) within the package while it is still intact. This type of non-destructive detection is even possible in stacks of multiple dies, as is often seen in SSD memory applications.
Common practice of physical failure analysis at MASER Engineering, after confirming the fault by electrical testing of the suspected defect device, is to start with a non-destructive approach by exposing the samples to 2D/3D X-Ray and Scanning Acoustic Microscopy (SAM) analysis. LIT can retrieve Z-axis information about the heat source by top and bottom imaging and phase analysis, which can guide the X-Ray and SAM analyses to localize package-related failures.
Besides package level fault localization, LIT can be used to localize chip level low-Ohmic defects that are often not found with Photon Emission Microscopy (PEM) or thermal laser-stimulated fault localization techniques (e.g. OBIRCH).
Another strong feature of the ELITE system is its thermal mapping ability, resulting in precise monitoring of absolute temperatures or temperature changes in and around a complex package without opening it, which allows precise verification of simulated temperature profiles within packages.
This contribution will introduce the background of Lock-In Thermography applications and show some examples of recent case studies at MASER Engineering that illustrate the importance of Lock-In Thermography for failure localization on package level and chip level.


About Lock-In Thermography

You can download here our Lock-In Thermography service leaflet.
More background information on LIT can be found in a recent publication.

For more information on this presentation and the Lock-In Thermography services at MASER Engineering, please contact Dr. Peter de Veen, Mr. Ewald Reinders (Sr. Physical Analysis Engineer) or Mr. Kees Revenberg (Managing Director).

DCG ELITE small.jpg 

About ESREF 2013

The ESREF 2013, the 24th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, will take place in Arcachon (France) from September 30th to October 4th, 2013. This international symposium continues to focus on recent developments and future directions in Quality and Reliability Management of materials, devices and circuits for micro-, nano-, and optoelectronics. It provides a European forum for developing all aspects of reliability management and innovative analysis techniques for present and future electronic applications. This event is organized by the IMS Laboratory (University Bordeaux 1) and ADERA Service with the technical co-sponsorship of IEEE - Electron Devices Society and ANADEF association (French association of industrial labs working in failure analysis).
More information on the ESREF 2013 can be found here